Embedded Processor complexities for Smart Grid

Before we explore on processing element for Smart grid. Lets understand the meaning of smart grid itself. It's meaning is vary vast and vague and there is no common definition for it. In current time it is of high interest for researchers, developers and governments and it is basically a newer version of conventional power system.

I myself understand Smart grid as power system which have bi-way communication between electricity department and consumer, integrating lots of intelligence in power control and billing charges control, integrating lots of renewable energy sources in it, applying lots of advance power electronics techniques to make more reliable, safe and high quality power. there is lots to add on .......

To achieve all above mentioned functionality of Smart Grid, the role of embedded processors will be to achieve high performance in the given real time situations. The embedded processors carry out tasks similar to security encryption, signal processing, power flow calculation etc. which are essential for data analysis and proper data transmission. Depending on where the embedded processor is in the smart grid hierarchy, the application running on the processor will be different. There must be a need for a new design in the micro-architecture of the processors specifically for Smart Grid application to achieve these complex tasks.

Distributed computing in the grid will help tackle the bottlenecks produced by various devices communicating with each other. Inexpensive computing solutions and memory nodes in the field are expected to redefine electric grid management because of the availability of ubiquitous wireless computing on every critical node of the smart grid. The computations could be for power flow calculations, security encryptions etc. all running

simultaneously. This motivates the need for a new improved and customized design for an embedded processor in the smart grid

Design space exploration for an embedded processor involves finding the values for the design parameters resulting in optimal performance. Optimizing one parameter at a time is a method which cannot be used as there are too many interactions among the parameters. When the design is for a multi core processor the design space increases multiple times.  The applications in the smart grid are diverse and require embedded processors which are fundamentally different in the micro-architecture.

Reference:

Sai, Rohith Tenneti Seetha, et al. "Architecture Exploration of a Heterogeneous Embedded Processor for the Smart Grid." Southeastcon, 2012 Proceedings of IEEE. IEEE, 2012.